Lectures:
Classes will be held on Mondays and Wednesdays from 9:00am to 10:15am in HLH17, Room 03.

Course Description:
This course is an intermediate to advanced level course focusing on digital design and use of Field Programmable Gate Arrays (FPGAs). In addition, it centers around the new computing paradigm of Cloud FPGAs, where the FPGAs are hosted remotely by cloud providers and accessed remotely by users. The theoretical aspects of the course focus on digital system modeling and design using the Verilog Hardware Description Language (Verilog HDL). In the course, students learn about logic synthesis, behavioral modeling, module hierarchies, combinatorial and sequential primitives, and implementing and testing the designs in simulation and real FPGAs. Students also learn about FPGA tools from two major vendors: for Xilinx FPGAs and Intel FPGAs (formerly Altera). The practical aspects focus on designing systems using commercial Cloud FPGA infrastructures: Amazon F1 service (Xilinx FPGAs) or through the Texas Advanced Computing Center (Intel FPGAs). Students learn about cloud computing, interfacing servers to FPGAs, PCIe and AXI protocols, and how to write software that runs on the cloud servers and leverages the FPGAs for acceleration of various computations. The course features semester project where students design, implement, test, and evaluate an accelerator design, such as Bitcoin miner, Deep Neural Network computations, Cryptographic circuits, or others.

Prerequisites:
Students should be familiar with digital design basics and have some experience with Hardware Description Languages such as Verilog or VHDL. Undergraduate students should have completed EENG 201 and EENG 348 before taking this course, or have approval of the instructor.

Guest Seminars:
An integral part of the course is attendance of seminars by guest speakers who will present recent advances in academia and industry that involve our use FPGAs. Students should attend each of the seminars listed on the schedule, and complete a seminar attendance sheet. If students are not able to attend one or more of the seminars, they should attend another EE or CS semianr.

A list of seminar speakers invited specifically for this course can be found on the lecture schedule. Generic listing of CS seminars can be found on the CS Calendar, while generic listing of all EE seminars can be found on the events page for School of Engineering and Applied Science.

Course Enrollement:
The course is open to graduate students in any department. Engineering students can take ENAS 968 for grade, Computer Science and other students should contact the instructor and their department's director of graduate studies to arrange for the course to be counted towards their degree requirements if possible.

Semester Project and Workshop Paper
There are three differences for graduate students, compared to requirements for undergraduate students. First, each student should arrange for meeting with the instructor and their academic adviser to discuss the semester project. Second, in most cases the project will be individual (compared to undergraduate projects done typically in pairs). Third, the graduate student's project should have sufficient depth and novelty so that it can be submitted as a workshop paper to FCCM conference; due date is typically in January after course completion.

Textbook:
The Verilog Hardware Description Language, Fifth Edition, by Thomas & Moorby. (approx. 90$) (free PDF access for Yale students when on Yale's computer network via https://link.springer.com/book/10.1007%2F978-0-387-85344-4)

Student Evaluation:

Please check for grading and assignment updates.

• Textbook and coding exercises: 40% of total grade
• Tutorial and coding work: 13% of total grade
• Guest seminar attendance: 3% of total grade
• Semester project: 44% of total grade
  • Preliminary project selection preferences: 2% of semester project grade
  • Project progress report 1 and presentation: 8% of semester project grade
  • Project progress report 2: 5% of semester project grade
  • Project final presentation: 5% of semester project grade
  • Project final report write-up: 10% of semester project grade
  • Project code and working demo: 70% of semester project grade

Grade Distribution:
It is expected that there will be a distribution of the grades and the goal is to have mean for the course that will be at or below the FAS (Faculty of Arts and Sciences) mean. However, in case the entire class is exceptional, students can expect better grades and a higher mean. In general, student outcomes will be represented by the letter grades: exemplary (A), very good (A- and B+), adequate (B and B-), and unsatisfactory (C, or lower).

Deadlines and Work Submission:
All deadlines are posted in the schedule. All work is due by 5pm Eastern Time on the given day, unless otherwise stated.

Common Points Deductions for Submitted Work:

• Late work -- for all work except the semester project, there is 10% penalty for each day late, penalty will not be prorated, e.g. 1 hour late is still 10% penalty, all work is to be submitted electroncially.
• Wrong format -- there is 10% penalty for submitting work in wrong format (not meeting length, font or other requirements if specified).
• Missing name -- there is 10% penalty for any work or files that are submitted without student's name clearly identified.
• Messy code -- points may be deducted for messy or unclear code.

Excuses and Extensions:
For any excuses for late work or extensions, please get a Dean's excuse and make an appointment with the instructor.

Collaboration Policy:
Collaboration can be a great learning tool, so students are encouraged to study together and help each other out. However, unless otherwise stated, all work is individual. Do not copy other's code or answers. Violations of this policy will not be tolerated and referred to the Dean.

Attendance:
You are responsible for all the material covered in class. The course covers materials that may not all be in the textbook or printed handouts, so attendance is crucial for good performance in the course.

Academic Integrity:
Please do not cheat or copy other's work. Make sure to cite any sources. All homeworks and submitted code will be reviewed for similarities. See more information about Academic Integrity and Plagarism at: https://poorvucenter.yale.edu/writing/wr-instructor-resources/addressing-academic-integrity-and-plagiarism.

Re-grading Policy:
Please bring up any issues with re-grading within one week from when the graded work was returned. Please write 2 ~ 3 sentences to justify each problem or part of code you would like re-graded and state why. The written request should be submitted by e-mail.

Portable Electronic Devices:
Using portable electronic devices for nonacademic purposes during class time is distracting to your peers and the instructor. Please silence all such devices and avoid using them unless it is for class-related purposes.

Special Accommodations:
If you require any special accommodations please notify the instructor as soon as possible. This includes any religious practice which may interfere with completion of a scheduled examination, lab or homework. Please contact instructor early on in the course to arrange a meeting where we can plan for any needed accommodations.

Instructor: Prof. Jakub Szefer, contact e-mail jakub.szefer@yale.edu

Undergraduate Learning Assistants (ULAs): Adam W.

Office Hours:
Jakub S. -- by appointment, please e-mail
Adam W. -- Mon. from 4:30pm to 7:30pm, please e-mail instructor to setup extra hours

Office Hours Location: Dunham Lab 5th floor, Room 518 or Room 519