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Program


Past workshops:

HASP 2017
HASP 2016
HASP 2015
HASP 2014
HASP 2013
HASP 2012

Hardware and Architectural Support for Security and Privacy (HASP) 2018

To be held June 2, 2018 in Los Angeles, California, USA -- in conjunction with ISCA 2018

Workshop Program


7:15 - 8:30 ISCA Provided Breakfast

8:45 - 8:50 Welcome Remarks

Side Channels & Spectre and Meltdown Session

8:50 - 9:10 NIGHTs-WATCH: A Cache-Based Side-Channel Intrusion Detector using Hardware Performance Counters
Maria Mushtaq, Ayaz Akram, Muhammad Khurram Bhatti, Maham Chaudhry, Vianney Lapotre and Guy Gogniat
PDF via ACM Digital Library
Presentation Slides
9:10 - 9:30 Cache Timing Side-Channel Vulnerability Checking with Computation Tree Logic
Shuwen Deng, Wenjie Xiong and Jakub Szefer
PDF via ACM Digital Library
Presentation Slides
9:30 - 9:45 WiP: Cross-Core Prime+Probe Attacks on Non-inclusive Caches
Mengjia Yan, Read Sprabery, Bhargava Gopireddy, Christopher Fletcher, Roy Campbell and Josep Torrellas
Presentation Slides
(WiP papers are not published in the proceedings and slides are provided at authors' discretion)
9:45 - 10:00 WiP: Towards a Stronger Indicator for Detecting Cache Timing Channel
Fan Yao, Hongyu Fang, Milos Doroslovacki and Guru Venkataramani
(WiP papers are not published in the proceedings and slides are provided at authors' discretion)
10:00 - 10:30 ISCA Coffee Break

Secure Processor Architectures Session

10:30 - 10:50 Spectres, Virtual Ghosts, and Hardware Support
Xiaowan Dong, Zhuojia Shen, John Criswell, Alan Cox and Sandhya Dwarkadas
PDF via ACM Digital Library
Presentation Slides
10:50 - 11:10 BASTION-SGX: Bluetooth and Architectural Support for Trusted I/O on SGX
Travis Peters, Reshma Lal, Srikanth Varadarajan, Pradeep Pappachan and David Kotz
PDF via ACM Digital Library
Presentation Slides
11:10 - 11:30 A Comparison Study of Intel SGX and AMD Memory Encryption Technology
Saeid Mofrad, Fengwei Zhang, Shiyong Lu and Weidong Shi
PDF via ACM Digital Library
Presentation Slides
11:30 - 11:50 SMARTS: Secure Memory Assurance of RISC-V Trusted SoC
Ming Ming Wong, Jawad Haj-Yahya and Anupam Chattopadhyay
PDF via ACM Digital Library
Presentation Slides
12:00 - 1:30 ISCA Lunch (serve yourself/buffet). HASP participants are encouraged to get some lunch tables to sit together for informal open discussion during lunch.

Memory and Architecture Security Session

1:30 - 1:50 An MLP-Aware Leakage-Free Memory Controller
Andrew Vuong, Ali Shafiee, Meysam Taassori and Rajeev Balasubramonian
PDF via ACM Digital Library
Presentation Slides
1:50 - 2:10 Fault Injection Attacks on Emerging Non-Volatile Memory and Countermeasures
Mohammad Nasim Imtiaz Khan and Swaroop Ghosh
PDF via ACM Digital Library
Presentation Slides
2:10 - 2:30 Rapid Detection of RowHammer Attacks using Dynamic Skewed Hash Tree
Saru Vig, Sarani Bhattacharya, Debdeep Mukhopadhyay and Lam Siew-Kei
PDF via ACM Digital Library
Presentation Slides
2:30 - 2:50 Position Paper: A case for exposing extra-architectural state in the ISA
Jason Lowe-Power, Venkatesh Akella, Matthew Farrens, Samuel King and Christopher Nitta
PDF via ACM Digital Library
Presentation Slides
2:50 - 3:20 Open Discussion on Architectures and Side-Channels

2:50 - 3:20 Discussion Lead: Frank McKeen (Intel) and Ruby Lee (Princeton) Discussants: attendees from industry and universities.


3:20 - 3:30 Closing Remarks

3:30 - 4:00 ISCA Coffee Break